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The Semiconductor Business Group focuses on plasma processes for advanced semiconductor packaging and assembly (ASPA), wafer level packaging (WLP), microelectromechanical systems (MEMS), data storage devices such as thin film read-write heads (TFH) for hard disk drives, and images sensors.

Applications > Semiconductor > Underfill

Underfill

The underfill process for flip chip packaging presents unique challenges, particularly with designs that include large die, tight gaps, and high-density ball placement. Capillary underfill is traditionally used in these flip chip packages to ensure the highest reliability. The process of capillary underfill is quite simple. The fluid is driven into the gap between the die and substrate via capillary forces. However, this simple dispensing process meets many challenges, particularly with advanced chip designs including die size, gap, bump density, and differing die passivation materials. Specific challenges include wicking speed, fillet height and balance, and underfill adhesion to various materials. All of these challenges are related to the properties of the substrate, underfill fluid, and flip chip device.

Plasma-enhanced surface preparation prior to the underfill process has proven to increase underfill wicking speed, increase fillet height and uniformity, minimize voiding, and improve underfill adhesion. The mechanisms for these improvements include surface energy and surface chemical composition changes.

The figures below display the effect of plasma for underfill fillet height and uniformity.

Fillet uniformity_001

Fillet uniformity_002

Adhesion enhancement between the underfill and the polyimide die passivation is illustrated in the figure below. The adhesion strength between the underfill and the die passivation is increased by over a factor of two with plasma.

Load graph

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Semiconductor Applications Team

Scott Szymanski

Scott Szymanski, Semiconductor Market Manager

Mr. Szymanski works to expand strategic alliances, strengthen partnerships with equipment suppliers, and develop future product offerings tailored to the semiconductor market. With 10+ years of experience at major semiconductor companies, he holds a B.S. degree in Mechanical Engineering from UCLA, and an M.B.A. from the University of Phoenix.

 

Peter Huang

Peter Huang, Semiconductor Applications Engineer

Mr. Huang joined March Plasma Systems in 2006. Prior to his appointment at March he has held a variety of positions in L3 Communications, Raytheon and Texas Instruments. Huang has a BS from Chung Yuan University in Taiwan and a MS from the University of Houston.

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The Semiconductor Business Group focuses on plasma processes for advanced semiconductor packaging and assembly (ASPA), wafer level packaging (WLP), microelectromechanical systems (MEMS), data storage devices such as thin film read-write heads (TFH) for hard disk drives, and images sensors. More>>>

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